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The Gravity of Intel Corp.'s 10-Nano Problems

Chip giant Intel (NASDAQ: INTC) had originally told investors back at its late 2013 investor meeting that its 10-nanometer manufacturing technology -- a technology that promised significant performance, power, and area enhancements over its then-upcoming 14-nanometer technology -- would be ready for mass production by the end of 2015 for product ramp-ups in 2016.

As of writing, Intel has yet to announce a single product built using its 10-nanometer technology. Per Intel CEO Brian Krzanich on the company's Oct. 26 earnings conference call, the company intends to ship its first 10-nanometer products by the end of the year, though it doesn't appear to expect computers powered by such products to become available until the second half of 2018.

A wafer of Intel processors.
A wafer of Intel processors.

Image source: Intel.

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To make matters worse, only a limited portion of Intel's product volume in 2018 is expected to be manufactured using this 10-nanometer technology -- virtually all of Intel's product volume in 2018 will be built using some derivative of Intel's 14-nanometer technology.

It seems clear that something has gone quite wrong with the development of Intel's 10-nanometer technology.

The good news for Intel and its customers is that the company has improved its 14-nanometer technology over time, which allowed Intel to introduce new-and-improved products in 2016, 2017, and is allowing them to prep new products for 2018.

While Intel's efforts to enhance its 14-nanometer technology is a sensible strategy for its Client Computing Group (CCG), it's unlikely to be a viable strategy for its Data Center Group (DCG).

Here's why.

It's all about chip sizes

The processors that Intel sells to the PC market are relatively small. For some perspective, Intel's latest Kaby Lake Refresh chip -- the part that's best described as Intel's workhorse in the laptop PC market -- has a silicon footprint of just 123 square millimeters. It's built using Intel's 14-nanometer+ technology.

Intel's hex-core Coffee Lake chip, manufactured using Intel's 14-nanometer++ technology, is a bit bigger, measuring in at 149 square millimeters.

To improve product features and capabilities, Intel can continue to introduce performance-enhanced versions of its 14-nanometer technology (tech publication SemiAccurate says that Intel's upcoming Whiskey Lake chip will be manufactured using a so-called 14-nanometer+++ technology) as well as potential design improvements.

These changes could lead to larger chip sizes, but considering the maturity of Intel's 14-nanometer technology at this point, those chip size increases probably won't lead to much of a change in the company's cost structure on those products.

A wafer of Intel data center chips in the background with fully packaged versions of those chips in the foreground.
A wafer of Intel data center chips in the background with fully packaged versions of those chips in the foreground.

Image source: Intel.

In other words: If Intel's 10-nanometer technology isn't viable, continuing to push 14-nanometer manufacturing and products to the limit is a reasonable strategy to keep its customers happy.

The problem here is that this strategy doesn't work as well with data center chips. Data center chips tend to be substantially larger than personal computer chips because they generally pack a lot more cores, memory controllers, and other technologies that customers in that market value.

Intel's latest server processor family, known as Skylake-SP, comes in configurations with 10, 18, and 28 processor cores. The 28-core part is believed to measure approximately 700 square millimeters -- near the limit of what can physically be manufactured using Intel's 14-nanometer technology.

This means that if Intel wants to build a next-generation data-center chip with, say, 34 cores, it'd be unable to do so with its current-generation 14-nanometer technology. It'd need a manufacturing technology that not only delivers better performance, but a meaningful area reduction as well.

Intel claims that its 10-nanometer technology offers about 2.7-times the logic density of its 14-nanometer technology. So, if Intel wants to bring a worthwhile leap in performance to its data center customers, it'll need to build its next-generation data center chips using a manufacturing technology that enables substantially greater density.

Intel's DCG needs 10-nanometer to become viable as quickly as possible.

What Intel's manufacturing group needs to deliver

Intel's main chip manufacturing competitor, Taiwan Semiconductor Manufacturing Company (NYSE: TSM), is expected to go into mass production on its 7-nanometer technology in the first half of 2018 in support of mobile processors that'll likely begin to show up in the market during the second half of 2018 (in other words, iPhone processors).

Intel's main competitors in the server/networking chip market aren't likely to use TSMC's 7-nanometer technology for product launches in the second half of 2018 (mobile products, which are smaller and therefore easier to manufacture, tend to go into production first).

However, it's quite reasonable to expect data center/networking chips built using TSMC's 7-nanometer tech (and possibly other chip manufacturers' competing technologies) to arrive in the first-half of 2019.

This means that Intel will need to roll out data center chips manufactured using some flavor of its 10-nanometer technology (likely its second-generation 10-nanometer+ technology for the first 10-nanometer data center chips and then 10-nanometer++ for the second round of such chips) in that time-frame if it wishes to remain competitive and avoid potentially large market segment share losses and/or significant average selling price erosion.

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Ashraf Eassa owns shares of Intel. The Motley Fool recommends Intel. The Motley Fool has a disclosure policy.