Aart J. de Geus; Co-Founder, Chairman & CEO; Synopsys, Inc.
Sassine Ghazi; President, COO & Director; Synopsys, Inc.
Shelagh Glaser; CFO; Synopsys, Inc.
Gianmarco Paolo Conti; Research Analyst; Deutsche Bank AG, Research Division
Harlan L. Sur; Executive Director and Head of U.S. Semiconductor & Semiconductor Capital Equipment; JPMorgan Chase & Co, Research Division
Jason Vincent Celino; Senior Research Analyst; KeyBanc Capital Markets Inc., Research Division
Jay Vleeschhouwer; MD of Software Research; Griffin Securities, Inc., Research Division
Joseph D. Vruwink; Senior Research Analyst; Robert W. Baird & Co. Incorporated, Research Division
Vivek Arya; MD in Equity Research & Senior Semiconductor Analyst; BofA Securities, Research Division
Yu Shi; Senior Analyst; Needham & Company, LLC, Research Division
Ladies and gentlemen, welcome to the Synopsys Earnings Conference Call for the Fourth Quarter and Fiscal year 2023. (Operator Instructions) As a reminder, today's call is being recorded.
I would now like to turn the call over to Trey Campbell, Senior Vice President, Investor Relations. Please go ahead.
Thanks, Lisa. Good afternoon, everyone. With us today are Aart De Geus, Chair and CEO of Synopsys; Sassine Ghazi, President and COO; and Shelagh Glaser, CFO.
Before we begin, I'd like to remind everyone that during the course of this conference call, Synopsys will discuss forecasts, targets and other forward-looking statements regarding the company and its financial results. While these statements represent our best current judgment about future results and performance as of today, our actual results are subject to many risks and uncertainties that could cause actual results to differ materially from what we expect.
In addition to any risk that we highlight during this call, important factors that may affect our future results are described in our most recent SEC reports and today's earnings press release. In addition, we will refer to certain non-GAAP financial measures during the discussion. Reconciliations to their most directly comparable GAAP financial measures and supplemental financial information can be found in the earnings press release, financial supplement and 8-K that we released earlier today.
All of these items, plus the most recent investor presentation are available on our website at www.synopsys.com. In addition, the prepared remarks will be posted on our website at the conclusion of the call.
With that, I'll turn the call over to Aart De Geus.
Aart J. de Geus
Good afternoon. In Q4, we exceeded the high end of all our guidance targets and delivered another quarterly revenue high at $1.599 billion. Q4 just capped a record year, growing revenue by 15% to $5.84 billion with strong orders expanding backlog by $1.5 billion to $8.6 billion. We further improved non-GAAP operating margin to 35.1%, increased non-GAAP EPS by 26%, generated $1.7 billion in operating cash flow, while maintaining an exceptionally strong balance sheet.
Truly, Synopsys has moved forward with sustained momentum. Over the last 5 years, we've grown revenue at 13% CAGR, expanded non-GAAP operating margin by 13 points and increased non-GAAP EPS at a 23% CAGR. Through the year, we also widened our differentiation by substantially expanding our AI-driven product capabilities, but also through unique collaborations that strengthened our customers' differentiation while cementing deep, long-term relationships. We thank our employees for their passion and dedication and our customers for their business and trust in Synopsys.
Meanwhile, dark geopolitical clouds are inflecting unimaginable harm in multiple conflict zones. Our hearts hurt with deep compassion for our employees, families, colleagues, customers and all others impacted by pain, loss and uncertainty. Yet, we will never give up the leaving in the positive potential of humanity. It is thus heartwarming to see how fast our teams have turned compassion into caring, caring into action. And our respect and support for each other is that active norm at Synopsys.
Let me now briefly share some thoughts on the state of the industry and our company before I pass the baton to Sassine. From the first days of Synopsys 37 years ago, Synopsys has enabled and navigated the exponential ambition that came to be defining the semiconductor industry and which, in turn, radically impacted the world. Our initial contribution, Synthesis, revolutionized digital design. We ushered in the transition from CAD, computer-aided design, to EDA, electronic design automation, so far delivering roughly a 10 million x increase in design productivity.
During Synopsys' entire existence, the vast majority of our products have been the state-of-the-art. Together with the leading foundries with us empowered digital age exponential referred to as Moore's Law. And then at the very moment that the economics of classic Moore's Law are slowing down in terms of transistor performance and cost improvements, the era of big data and AI becomes real, triggering enormous compute needs on the horizon.
About 8 years ago, Synopsys forecasted, this age of Smart Everything would become the driver for the semiconductor growth to $1 trillion in this decade. And here we are. This year's generative AI advances and furious adoption clearly fulfill our vision. As pervasive AI is now massively underway, the classic Moore's Law era in turn, is morphing into the SysMoore era, systemic complexity, but still with a Moore's Law exponential ambition. SysMoore is happening in front of our eyes by reinventing architectures not based on a single chip but on multiple chips, tightly connected or even stacked on top of each other with extreme proximity. These so-called software-defined multi-die architectures will enable massive increases in the number of transistors available. And again, Synopsys is at the heart of the heart of capitalizing exponential impact.
Our investments in multi-die design, our massive collection of IP building blocks in many silicon technologies, our prototyping and electronic digital twinning technology that lets customers run software before the hardware actually exists are all essential enablers driving the new race into AI-driven computation. Adding one more spark to our technical leadership, Synopsys has also pioneered the use of deep learning AI and chip design. Applied to optimization, verification and test, production results are outstanding and adoption is broad and rapid.
Most recently, our announcement of exciting gen AI capabilities adds yet another angle to driving the state-of-the-art for it. If nothing else, my enthusiasm for both the SysMoore opportunity and for our technology advances to give you a sense of Synopsys is on the move.
Talking about on the move, we're also well on the way in our executive leadership transition. I have great confidence, expectations and enthusiasm for Sassine Ghazi as our next CEO. Sassine, please give us your perspective, vision and ambition for Synopsys. The floor is all yours.
Thank you, Art, for your pioneering work in our industry and for building Synopsys into one of the world's essential semiconductor ecosystem companies. I am profoundly grateful for the opportunity to succeed you as CEO, building on our strong foundation and propelling Synopsys to the next wave of growth.
Let's turn to market trends. Despite global macroeconomic uncertainty, our customers continue to prioritize R&D investments and chip design starts remain robust. We leave 2023 with $8.6 billion in noncancelable backlog and have a time-tested business model that balances dynamic growth with macro resiliency. We expect solid growth across our geographies in 2024, but our outlook reflects a continued challenging near-term growth environment in China.
China is an adaptable and large market. However, given the combination of entity list and technology restrictions and a weaker macroeconomic outlook, we believe more pragmatism in our 2024 China forecast is appropriate.
Technology trends continue to create a rising tide for our business. Chief among those trends is a new era of AI-driven productivity. AI is reshaping industries and providing breakthrough solutions for intractable challenges, like the 15% to 30% design resource shortage that semiconductor is facing this decade. We pioneered AI-driven semiconductor design and are relentlessly advancing our AI capabilities so that we can drive step-up function improvement in our customers' productivity, and thus, play a greater role in their success.
Recently, at Microsoft's Ignite Conference, we announced a breakthrough generative AI capability for accelerating chip design, Synopsys.ai Copilot. The new capability is the result of a strategic collaboration with Microsoft to integrate Azure's service that brings the power of gen AI into one of the most complex engineering challenges, the design process for semiconductors. The integration of gen AI across Synopsys.ai provides chip designers with collaborative capabilities that offer expert tool guidance, generative capabilities to enable RTL and collateral creation, and fully autonomous capabilities for workflow creation from natural language.
We're engaged with leading chip makers, including AMD, Intel and Microsoft to deliver the value of gen AI across the Synopsys.ai full EDA stack, from design, verification, test to manufacturing. We are at a very early stage of this new AI era, but our initial customer results are exceptional. AI is key to massively unlocking customer productivity. And we are increasing our investment to accelerate the Synopsys.ai road map.
Beyond AI, we see multiple other secular tailwinds providing our design automation and design IP business expanding growth opportunities. With the slowing of Moore's Law, increasingly, architecture and design automation are the main levers in delivering semiconductor PPA gains even as insatiable use case demand push the frontiers of performance and performance per watt. Multi-die implementations are accelerating as our customers seek to optimize cost and yield for these large complex designs. And our customers who rely on our critical competencies from silicon to software now requires systems-level approach both at the semiconductor device level with multi-die and the electronic design, software bring-up and software validation of full systems like today's software-defined cars.
Our design IP business also has strong wind in its sails. Applications claimed ever faster ingest and throughput, resulting in faster protocol migrations and increasing IP content value per device. Customers are prioritizing scarce design resources to focus on their critical architectural differentiations and turning to us as an integral part of their chip design development teams for their foundation and interface IP needs. And now all 3 leading edge foundries are making Synopsys the advanced node IP vendor of choice. They are partnering with us on a broad range of IP titles to minimize risk and accelerate silicon success.
Our design automation and design IP businesses have both leadership technology and market positions with industry trends playing to our strengths. We're increasing our investment in these segments to capture more of this growing TAM. We started our investments in software integrity with the acquisition of Coverity in 2014. Software Security was a pain point for every company and risk services were expanding. Customers were searching for innovative approaches in quality and security testing to help reduce the risk of software failures and security breaches. And we developed the broadest portfolio to meet that need.
Flash forward to today, our Software Integrity business has become the leader in application security testing with industry-leading team delivering over $0.5 billion in trailing 12 months revenue at mid-teens non-GAAP operating margin.
We are proud of the significant progress we've made over the last 9 years and believe the future opportunity remains attractive. At the same time, we have compelling investment opportunities in design automation and design IP with much higher expected growth and return profiles.
Following our strategic portfolio review, and in consultation with the company's Board of Directors, we have decided to explore strategic alternatives for the Software Integrity business. As part of this process, we're considering full range of strategic opportunities. We will provide an update after we conclude that process.
Based on these market and technology trends, and with high confidence in our business, here are our 2024 guidance targets.
We expect 2024 revenue between $6.57 billion and $6.63 billion. We expect to deliver 37% non-GAAP operating margin, a 200 basis point improvement versus last year. We expect full year non-GAAP EPS between $13.33 and $13.41. Shelagh will discuss the financials in more detail.
Now I'll share some segment highlights starting with Design Automation. This quarter, Synopsys.ai was selected by AspenCore to receive the World Electronics Achievement Award for EDA Software of the Year. We're proud of the recognition but even more excited by the strong customer adoption for Synopsys.ai across the design flow. A major North American hyperscaler made a major commitment to use DSO.ai after demonstrating PPA and productivity benefits on consecutive HPC projects.
In verification, we engaged with over 20 customers in Q4, demonstrating up to 10x faster turnaround time. While in test, we added 8 new customer engagements with Kioxia publicly highlighting more than 50% pattern reduction. Finally, we and TSMC announced that our analog migration flow through Synopsys.ai is enabled across TSMC's advanced process technologies. We are also seeing great results deploying Synopsys.ai internally with our IP teams. Internal IP teams are seeing 10x turnaround time improvements in time to target verification coverage and have deployed analog design migration flows for TSMC 2-nanometer.
Fusion Compiler continues to win key designs, including the leading-edge ARM mobile core for the industry's first implementation for a gate all around based mobile SoC. In combination with DSO.ai, Fusion Compiler also delivered 10% better power on gate all-around based mobile GPU and modem designs. We saw continued momentum in sign-off delivered by our leadership family of prime tools. We won multiple engagements with PrimeTime, PrimeClosure and Prime Shield and saw the world's top 3 data center providers adopt PrimeClosure to get the fastest ECO closure time for 5 3-nanometer SoCs.
Expanding our multi-die ecosystem, we received a prestigious leadership award from TSMC, OIP 2023 Partner of the Year, for developing the industry's first 3DIC design prototyping solution, supporting the new industry standard 3Dblox. Verification, product momentum also remains strong. This quarter, we announced our AI-driven next-generation [VRD] solution, which continues its lead in functional debug with deployment already at more than 10 top semiconductor companies. In hardware-assisted verification, we delivered another record year. In Q4, ZeBu won against competition at 2 large North American hyperscalers and we expanded our [HAPS] footprint with a large North American systems company and a large Asian semiconductor company.
Now turning to design IP. This quarter, we won our first 2-nanometer interface IP engagement with a leading mobile company and are now in production at 3-nanometer with foundation IP for a high-volume PC chip.
We delivered a key multi-die proof point in concert with Intel and TSMC on UCIe interoperability. The demonstration at Intel Innovation showed die-to-die interconnect over UCIe between Synopsys IP on TSMC and CE and Intel foundry silicon. We saw two other key technology proof points this quarter. We demonstrated interoperability for our 224 gig Ethernet PHY IP and PCIe 6.0 IP, both industry firsts. On the processor IP side, we announced a new addition to the ARC processor IP portfolio, the RISC-V ARC-V processor IP. This product allows customers to choose from a broad range of flexible, extensible processor options that deliver optimal power performance efficiency for their target applications. Finally, we delivered a significant win in automotive, displacing competition at a marquee customer in a multi-generation multiple project agreement.
Now to the Software Integrity segment. which delivered solid growth against the backdrop of continued macro headwinds for enterprise software. In Q4, we saw over 50% year-over-year growth in our Polaris Software Integrity Platform. Polaris is a SaaS-based application security testing solution optimized for the needs of development and Dev SecOps teams.
We were also recently recognized as a leader in the Forrester Wave for software composition analysis. This was based on an evaluation of Black Duck, our software composition analysis solution.
In summary, we had an outstanding Q4 and FY 2023 financial results and operational execution and take tremendous forward momentum into 2024. We have a resilient business model and our customers continue to prioritize investments in the chips and systems that position them for future growth. We are aligning our portfolio investment with the greatest return potential to accelerate our growth. Deepest thanks to our employees, partners and customers for their passion and commitment.
With that, I'll turn it over to Shelagh.
Thank you, Sassine. 2023 was an excellent year highlighted by record revenue, record non-GAAP operating margin and record earnings. We continue our strong execution with financial discipline and are confident in our business heading into 2024, driven by our execution and leadership position across our segments robust chip and system design activity by our customers who continue to invest through semiconductor cycles and with $8.6 billion in noncancelable backlog, the stability and resilience of our time-based business model. As a result, while the macro environment is uncertain, we expect to grow revenue 12.4% to 13.5%, expand non-GAAP operating margin by approximately 2 percentage points and drive non-GAAP EPS growth of 19% to 20% in 2024.
Let me provide some highlights of our full year 2023 results. We generated total revenue of $5.84 billion, up 15% over the prior year, with double-digit growth across all key products and geographies. Total GAAP costs and expenses were $4.6 billion, and total non-GAAP costs and expenses were $3.8 billion, resulting in non-GAAP operating margin of 35.1%. GAAP earnings per share were $7.92 and non-GAAP earnings per share were $11.19 up 26% year-over-year.
Now on to our segment. Design Automation segment revenue was $3.78 billion, up 14%, driven by strength in EDA software and hardware. Design Automation adjusted operating margin was 38.1%. Design IP segment revenue was $1.54 billion, up 17%, driven by broad-based strength. Design IP adjusted operating margin was 34.5%. Software Integrity revenue was $525 million, up 13% and adjusted operating margin was 14.5%.
Turning to cash. Operating cash flow for the year was $1.7 billion. We ended the year with cash and short-term investments of $1.59 billion and total debt of $18 million. During the year, we completed buybacks of $1.2 billion or 80% of free cash flow.
Now to targets, which reflects the impact from export control regulations and assume no further changes for the year. Based on our current assessment of timing of hardware and IP deliveries, we expect the first half, second half split of approximately 48% to 52% for revenue and non-GAAP EPS.
For fiscal year 2024, the full year targets are: revenue of $6.57 billion to $6.63 billion; total GAAP costs and expenses between $5.0 billion and $5.05 billion; total non-GAAP costs and expenses between $4.14 billion and $4.18 billion, resulting in non-GAAP operating margin improvement of roughly 2 percentage points. Non-GAAP tax rate of 15%; GAAP earnings of $9.07 to $9.25 per share, non-GAAP earnings of $13.33 to $13.41.
Cash flow from operations of approximately $1.4 billion which includes an impact of approximately $200 million of 2023 taxes that we will pay in '24 and approximately $400 million of higher cash taxes due to the amortization of R&D expenses. Following 2024, we expect cash tax growth rate to be approximately in line with operating income growth over a multiyear period.
Now to targets for the first quarter, which includes an extra week compared to the first quarter of fiscal 2023. Revenue between $1.63 billion and $1.66 billion, which includes approximately $70 million from the extra week, total GAAP costs and expenses between $1.22 billion and $1.24 billion, total non-GAAP costs and expenses between $1.02 billion and $1.03 billion; GAAP earnings of $2.40 to $2.50 per share, non-GAAP earnings of $3.40 to $3.45 per share, including approximately $0.14 from the extra week.
Our press release and financial supplement include additional targets and GAAP to non-GAAP reconciliation. I also want to highlight that we will be hosting our Investor Day on March 20, which will be held in conjunction with our Synopsys Users Group event in Santa Clara. We look forward to seeing many of you there.
In conclusion, we entered 2024 with momentum and confidence reflecting our leadership position across our segment, robust design activity by our customers who continue to invest through semiconductor cycles and the stability and resiliency of our time-based business.
With that, I'll turn it over to the operator for questions.
Question and Answer Session
(Operator Instructions) We'll take our first question from Harlan Sur with JPMorgan.
Harlan L. Sur
Congratulations on the strong execution and fiscal '24 guidance. Hardware verification emulation prototype (inaudible), I mean, this has been a big contributor to your double-digit revenue growth profile over the past number of years. Lots of customers focusing on verification on these very complex chip design, a lot of them wanting to get a head start on the embedded and application software development. Is the team anticipating another strong year next year for hardware?
Will it be growing at a double-digit sort of growth rate within your fiscal '24 guidance? And if I look at inventories, right, they're up 53% year-over-year to kind of record levels, which I think is a good indicator of a strong hardware pipeline, but wanted to get your views.
Yes. Thanks for the question. In terms of the need, exactly the way you highlighted it, the requirements to develop software early and having a hardware-assisted verification to enable that step in the process is not only continuing, is accelerating with many system companies are trying to design their chip. Or even if they're getting a chip from a semiconductor company, they want to start their software development and verification of the system early.
And this is where our HAPS and Zebu platform comes in to enable that part of the solution. We're anticipating that to continue into 2024. As you saw as well, we had a record year for our hardware-assisted verification in '23, and we don't anticipate anything different that will change going into 2024. As for the inventory comment, I'll turn it to Shelagh for comments.
Sure. As Sassine said, we had a record in 2023. We expect another record in 2024, and we're building inventory to be able to fulfill our customer demand.
Harlan L. Sur
Perfect. And maybe a similar question on your IP business, strong growth last year, right, up 17% going forward. I mean just continued tailwinds, right? Chip design complexity, driving more reliance on off-the-shelf IP licensing. And just as importantly, right, there's some pretty big transitions on the interface and connectivity side, PCIe gen 5, CXL, DDR5, HBM3E looking at your pipeline backlog, customer programs, will the IP business be growing slower, faster in line with the fiscal '24 sort of total revenue profile?
So again, exactly the way you're outlining the requirement. There is two factors. There's the complexity. And then there is 0the different methods of designing an SoC or chip with multi-die is opening up the door for new protocols, UCIe, the PCIe, the CXL, the one that you've listed. There are different protocols for various markets for automotive.
As they expand their sophistication in developing the electronic system, it requires different requirements for the IP, interface IP for an automotive application. What we outlined in the script as well is today, we are the leading supplier for TSMC, Samsung and Intel foundry business. And that puts us in a great position because most of these complex chip developments are on these advanced foundries. And today, we are in a very fortunate position to be the partner and the leader in providing the IP for that business. So we expect that growth to continue, given the market demand for the sophisticated chips will continue.
We'll take our next question from Joe Vruwink with Baird.
Joseph D. Vruwink
Great. Maybe want to start by parsing out some of the demand commentary. So first, there was a big step up in backlog I'd imagine that bodes well for 2024 and 2025 is positive to revenue. At the same time, maybe the incremental moderation you're signaling in China, as I think about just the last 12 months, I think China contributed about 2 points worth of revenue growth, just the incremental revenue contribution from China. So arriving at the 13% growth guidance, are you (inaudible) than 13%. And then China is maybe just a more neutral factor in your outlook?
We really took a balanced approach as we look at the guidance and the forecast for FY '24. We took into account some of the headwinds that we're seeing and of course, the number of the tailwinds that we are observing in the market. A couple of the headwinds, as we mentioned, one of them is China. And the 2 factors. One is the continued export restrictions and the other one that I'm sure all of you are observing, which is the macro economy inside China. The other headwind we took into account is the continued stress and pressure from enterprise software spending that does impact our software integrity business. Some tailwinds, and this is where we get excited about is exactly what we're seeing.
The AI as a megatrend is driving amazing silicon demand and that silicon demand is complex. It's on the most advanced nodes and it's giving us an amazing opportunity for our design automation and design IP. So as we took into account the both headwinds and the tailwinds. We came with a balanced view of the guidance around 13% midpoint for FY '24.
Joseph D. Vruwink
Okay. That's clear. And then just on the topic of generative AI. I did want to maybe get your take, if it's possible to contrast just the pace of product development incorporating such a technology relative to what you've done in the past? And I guess the context for this question, as I think back to DAC in July, there were actually members of the Microsoft verification team speaking about how they wanted more robust tools from their EDA vendors that incorporated gen AI and we're not very far from July. And here you are with a product in conjunction with Microsoft and now Microsoft verification is using this in their workflows. So it seems like a very quick turnaround. Is it that much quicker than maybe what Synopsys was able to do in the past?
Maybe we made it look too easy, Joe, but there was a lot of work that started well ahead of the DAC time frame. If I take a quick step back, when we talk about Synopsys.ai, there are really 4 pillars under it. The one that we -- the first one we did produce was DSO.ai in the 2020 time frame. That was focused mostly on optimizing the -- our product and using every opportunity to leverage machine learning and AI in the product and around the product.
The second pillar, which is what we're calling a collaborative capability using gen AI, and that's what we announced with Microsoft, which is using a CoPilot approach for supporting our users for knowledge-based or workflow base or results, CoPilot and assistance. And that's in our announcement where AMD, Intel, Microsoft were some of the early users of the technology. Then we talked a little bit about what's coming down the path, which is around both generative and autonomous capability using gen AI and natural language. We're super excited actually about the early results we're seeing with the CoPilot in terms of the productivity of our customers and users.
We'll take our next question from Vivek Arya with Bank of America Securities.
If I remove the -- I think you said about $17 million or so impact of the extra week. You're guiding to roughly 12% sales growth right, which seems to be very conservative relative to the strong backlog that you have built up. So I'm curious, Sassine, I think you mentioned the impact of China and enterprise software and AI is kind of neutral, but then when I look at the 12% growth that is lower than what you had in the last 3 years, even though there is all this AI excitement that's starting now. So is it conservative? How should we kind of put this 12% in the context of the kind of growth rates we are used to seeing from Synopsys over the last 3 years?
So Vivek, thanks for the question. This is Shelagh. I'll jump in on that. So we're obviously taking a balanced stance as Sassine talked about at the we're at a 13% growth year-over-year. And we're seeing design automation, design IP have incredibly strong momentum. You mentioned the $8.6 billion backlog. We're seeing that growth in line with our long-term targets.
And we're seeing AI as a catalyst, but it's in its early inning. So we think it's a long-term growth catalyst. And we're looking forward to having it be able to help drive our business over the horizon. But the 2 headwinds are China, as we've talked about, the macro situation in China and the restrictions that have been imposed on China, are having some dampening effect.
We expect China to grow in '24, but at a lesser rate than it grew in '23. And the other headwind that we have is we are expecting a muted environment for enterprise software spend to impact our Software Integrity business, and we're assuming that, that business will be single-digit growth in 2024. So it's the combination of those headwinds and tailwinds that's leading to our 13% growth rate at the midpoint.
Got it. And for my follow-up, the AI CoPilot, seems like a very interesting new product. I'm curious what is the right way to track how you are able to monetize it? Are you selling it as incremental feature. Are you selling it as a separate tool, right? What is the right way to just kind of track how successful you are with this capability?
So the way we're thinking and we expect this over the last few calls, which is AI will be offered to our customers through a subscription license, meaning, if a customer wants to use an AI capability, be it a DSO.ai or VSO.ai, it will be offered as an incremental spend for the customer to get access to that technology.
And in some early adopter cases where they're still not ready to make the long-term commitment, we're offering it as well in terms of consumption base. They may be looking for one project to use it, et cetera. And the CoPilot in particular case, it's still very early, very early stage in terms of us to talk about monetization and how is it contributing overall. But those are the flexibility tools per se, we're providing the customer to get access to it.
We'll take our next question from Jason Celino with KeyBanc.
Jason Vincent Celino
Great. The backlog number, it's quite impressive. Looking back at the last couple of years, it looks like it's sequentially the biggest quarter-over-quarter increase we've ever seen, up 20% year-over-year. Just wanted to check how much of this has been driven just from the AI design activity or the AI tool revenue. It sounds like it was more broad-based, but just wanted to check.
With AI, we communicated last quarter that what we're observing on average and that's average -- emphasizing the average because in some cases, we're seeing a much bigger number or lesser number. About 20% contract over contract growth when a customer is renewing their EDA agreement and asking for the AI capability to be added.
The other point that I made earlier with Vivek, I'd like to emphasize as well, that we are in early stages of that monetization with AI. We still have customers that they are in early adoption, meaning if they have x number of projects, they may be using it on 1 or 2 projects and other customers, they stopped early and they're going more aggressively. But to give you a sense, it's roughly 20% on the EDA side, contract over contract growth we're observing.
Jason Vincent Celino
Okay. Interesting. And then one question on the OCF guidance. It will be down next year. Are you saying that there's a $600 million headwind from cash taxes and then additional amortization and then are you saying it's going to grow just in line with net income growth that you're after? Can you clarify?
Yes, Jason, thanks for the question. So the total impact from taxes is $600 million as we're moving to the new tax guidance where R&D is capitalized. Out of that $600 million, $200 million of it was payable in November. We've already paid it, which was for 2023 and then $400 million of that $600 million is for 2024. And again, both of those are impacted by the amortization of R&D. As we move forward, as we move into 2025 and beyond, we anticipate that the growth of the cash tax rate will align with the growth of our operating income. So there is a bit of a big step up this year. We do not anticipate that same level step up as we move forward.
Jason Vincent Celino
Got. But this is the new base level, right?
It is because we're now going forward for the foreseeable future, we will be amortizing R&D. And for us, about half of our R&D is in the U.S. and about half of our R&D is outside the U.S. So that new scheme is with us for the foreseeable future.
We'll take our next question from Jay Vleeschhouwer with Griffin Securities.
For Aart and Sassine, first, then a financial follow-up for Shelagh. For Aart and Sassine, one of the tailwinds that you've had for the last number of years, and we've spoken about this often is what you've referred to as domain-specific architectures on the part of your customers or specialty chips. And AI is probably a very special case of that. The question is, how do you think the whole phenomenon of the main specific design at either the chip or system level is going to be fundamentally altered by the AI phenomenon? And in turn, what does it mean for any additional investments you need to make outside of R&D, for example, in AE capacity services, et cetera?
Yes. Thank you, Jay, for the question. You're right. The whole domain-specific architecture I want to say, about 6, 7 years ago, we started seeing a number of customers investing in it mostly hyperscalers. And you can argue before that couple of the mobile companies started optimizing based on their own system software optimizing their silicon.
With the hyperscalers, initially, the target was -- can they -- based on the workload -- on a specific workload, can they develop a chip that is more effective for power, performance cost, et cetera. And the answer is yes, and they made a number of these investments. Now you're seeing another wave of expanded investment around AI and how can they train the models that they are creating for, again, their specific applications.
And I'm sure you've noticed in the last couple of weeks almost the top 3 hyperscalers announce their own silicon investments and chips for AI specific training to drive more optimization and efficiency for their workloads. What that means for Synopsys is not only it's another chip that our customer base is investing in, which drives both EDA and IP, typically, they are the most advanced node and different methodology in many cases, they're pushing towards multi-die and chiplets, which opens up the door for IP and the comments I made earlier.
From our solution point of view, yes, we're expanding the solution offering to enable our customers to design these complex chips. On IP, I want to say it's fairly straightforward. You deliver 2 standards to connect these chips. But the work is not straightforward, but the road map is fairly straightforward what you need to do. On the EDA side, we have a number of those customers using 3DIC Compiler, which gives them the ability to architect that chip for that system in that case.
SLM, the silicon life cycle management to give them the ability to trace the health and the connectivity of these dies into the system and all the way in the field or in the hyperscale case as it sits into their data center and it's up and running. So we have a number of expansions in our portfolio in order to support these opportunities. And that's why we are bullish and excited about the opportunity to continue the growth for design, automation and design IP.
Okay. For Shelagh, one of the largest components of your backlog has been FSAs which are, I would assume, largely related to IP. Is there any reason to believe that in future, the pull down of FSAs for IP consumption would be faster or larger than has been the case to date. And for that matter, were FSA is a large component of the $1.5 billion sequential increase in backlog, which you noted.
There's not a -- I wouldn't note a different percent of FSAs. It's certainly something that many of our customers who are purchasing IP preferred that model, but there's not a different mix.
We'll take our next question from Charles Shi with Needham.
Congrats on the very strong results, guidance and the backlog number. I want to ask a little bit -- I think a little bit more into the backlog number because you have relatively consistent, I mean, ratios in terms of how much backlog goes into RPO, how much RPO goes into current RPO and how much the current RPO covers next year's revenue. With that at the same ratio as in the past few years, I thought you would have guided a little bit higher given that $8.6 billion backlog.
So how should I reconcile this? Is it something like at this time, the average contract duration is a little bit longer within that $8.6 billion backlog? Or there's some conservatism around what will you want to guide for '24?
Yes. Thanks for the question. So the backlog was broad-based. It was across multiple customers. And as Sassine said, some of them was larger renewals and new deals that we booked. There was -- there's no change in the duration in our contracts. So there's no change from our typical duration. As we were putting the forecast together for the year, we are really balancing the headwinds and tailwinds that we're seeing in the business, and we're seeing -- because of the backlog, we're seeing very strong momentum in the core business in design automation and design where we're seeing the headwinds is on China, in particular, which obviously has been a large growth driver for us for the last several years.
We're seeing that growth rate slower and then the other one is SIG, which the Software Integrity business is still -- we anticipate going to be impacted by a difficult software enterprise purchasing environment. And so that's why we've got that business forecast at single-digit growth. So it's really the balancing of those things. But we are seeing design automation and design IP aligned with our long-term goals for those businesses.
Yes. Maybe a quick follow-up on the half-over-half profile for next year because I mean, I would think that EDA revenue, I mean, because of its time-based nature and you guys keep signing bigger contracts, you tend to be like up to the right kind of profile through the year. but you're relatively flattish half-over-half profile seems to suggest that the IP maybe some of the hardware is going to be a little bit front half loaded. Is that the case? And why is that a thing?
Yes. It's really just the balance of how we see the customers wanting to ingest our hardware and our IP business. So it's fairly aligned also with what we saw in '23 and fairly aligned with what we saw in '21.
Maybe, Charles, if I'll add a couple of comments to what Shelagh just said. Rough numbers, our design automation is about 65% of our business and then design IP, 25% and software -- 10% and the $8.6 billion is mostly those agreements in EDA and IP and given the large percentage of the overall revenue we have, which is 25% is IP. There's a different pull down and development of the IP, especially on the advanced nodes, when we're talking about we're developing our IP portfolio on the most advanced foundries, from the day you sign an agreement to the day you deliver, there's a time lapse by when did you deliver the IP and you get the pull down.
So while the backlog number, the $8.6 billion is large, we need to get, I would say, used to that the consumption for EDA and IP will be very different across that backlog number and the timing of the renewal et cetera.
Thanks, Charles. Let's do one more question and then if you could turn it back over to me, Lisa.
We'll take our next question from Gianmarco Conti with Deutsche Bank.
Gianmarco Paolo Conti
So I guess the first one would be, how should we think about the recurring revenue rate into 2024? Is it fair to assume that given that we're expecting another record hard of the year into '24, it will inch closer to 80%.
And secondly, could you provide some more color on the SIG strategic initiatives that you're considering?
Maybe I'll talk about the SIG initiative, and Shelagh will comment on the backlog. The -- what we've said in the remarks that we went through a strategic portfolio review, just to put some context around what we went through. As I stated earlier, we have the 3 business segments and we are truly fortunate that we have a leading position in each one of those segments. As we look at the opportunities over the next 5 to 10 years of these market segments, I cannot express how excited we are about the opportunities we have in design automation and design IP. And the more we can expand our portfolio within these market segments.
So that led us to discuss and make a decision to explore the strategic alternatives for software integrity to put priority of where to make our investments and where we believe there's a higher ROI for the investments based on the 90% of our portfolio between the design automation and design IP business segments. So that's really the process that we went through in order to get to that point.
Yes. And I would add that on the recurring revenue question, we're not expecting a substantial change in that. We've had a record hardware year in '22 and '23, and we're expecting another one in '24, but the overall business is growing too. So it won't substantially change the mix of recurring revenue.
Thanks, Johnny. Let me turn it over to Aart for some closing remarks.
Aart J. de Geus
Thank you. A couple of personal words in closure here. Since the IPO in 1992, this is my 128th earnings call. I did not miss a single one, but I suspect that literally only (inaudible) remembers exactly what was said at each one of these calls. So a big thank you to you, Jay. But really huge gratitude to all of you for your feedback, your write-ups, your advocacy on the market. but also for never giving up on asking questions where you perfectly well know that we will never answer them.
So I really hope that you will keep that up with Sassine, but more importantly, a gratitude for having been travel made and family members in raising this fragile Synopsys start-up child into the strong worldwide market and technology leader that is today. Thank you.
Now some CEO transitions are hard, but I think we're doing very well. Sassine is the perfect choice for CEO. He already leads with ambition, heart and smart and of course, his 25 years of experience at Synopsys is comprehended is complemented, I should say, by great customer relationships and very importantly, trust. Sassine has my respect, my enthusiasm and my full support. So please give him your support as well. With that, I look forward to from time to time, touching base with you, so until then, be well and thank you very much.
Thanks, everyone, for joining the call. Lisa, can you close this out?
Thank you. And that does conclude today's presentation. Thank you for your participation today. You may now disconnect. And that does conclude today's presentation. Thank you.