Dublin, May 26, 2022 (GLOBE NEWSWIRE) -- The "ADAS/AD Chip Industry Research Report, 2022" report has been added to ResearchAndMarkets.com's offering.
The world's leading autonomous driving AI training chips include: Intel Ponte Vecchio, NVIDIA A100, Tesla D1, Huawei Ascend 910, Google TPU (v1, v2, v3), Cerebras Wafer-Scale Engine, Graphcore IPU, etc.
Autonomous driving chip research: In addition to computing power, core IP, software stacks, AI training platforms, etc. are becoming more and more important
L2.5 and L2.9 have achieved mass production for vehicles running on the road, and mass production of L3 and L4 in limited scenarios has become a goal for OEMs in the next stage.
In March 2022, the U.S. National Highway Traffic Safety Administration (NHTSA) issued final rules eliminating the need for automated vehicle manufacturers to equip fully autonomous vehicles with manual driving controls to meet crash standards. The United States is expected to introduce more important policies for autonomous driving in the future to guide L3/L4 autonomous driving on the road.
In this context, ADAS/autonomous driving chips have seen a wave of upgrades, and many chip makers have launched or planned to unveil high computing power chips. In January 2022, Mobileye introduced the EyeQ UltraT, the company's most advanced, highest performing system-on-chip (SoC) purpose-built for autonomous driving. As unveiled during CES 2022, EyeQ Ultra maximizes both effectiveness and efficiency at only 176 TOPS, with 5 nanometer process technology. Although it looks less potent than chips from rivals Qualcomm and NVIDIA, the cost-effective and high-energy-efficiency EyeQ UltraT may still be favored by OEMs.
In addition to computing power, self-developed core IP is the focus of competition for major SoC vendors
SoC chips, which are mostly involved with heterogeneous design, include different computing units such as GPU, CPU, acceleration core, NPU, DPU, ISP, etc. Generally speaking, computing power cannot be simply evaluated from the chip alone. Chip bandwidth, peripherals, memory, as well as energy efficiency ratio and cost should be also taken into account. At the same time, the development tool chain of SoC chips is very important. Only by forming a developer ecosystem can a company build long-term sustainable competitiveness.
In chip design, the configuration of heterogeneous IP is crucial, and autonomous driving SoC chip vendors are constantly strengthening the research and development of core IP to maintain their decisive competitive edges. For example, NVIDIA upgraded its existing GPU-based product line to a three-chip (GPU+CPU+DPU) strategy:
GPU: NVIDIA enjoys superiority in GPU and image processing derived from GPU;
DPU: NVIDIA announced the completion of its acquisition of Mellanox Technologies, Ltd., an Israeli chip company, for a transaction value of $7 billion and launched the BlueField-3 data processing unit (DPU). DPU is a programmable electronic component with the versatility and programmability of a central processing unit (CPU), dedicated to efficiently handling network data packets, storage requests or analysis requests;
In terms of CPU, NVIDIA intended to acquire the semiconductor IP semiconductor ARM as an extension of its three-chip strategy, but it failed in the end. However, NVIDIA launched the GraceT CPU, an Arm-based processor that will deliver 10x the performance of today's fastest servers on the most complex AI and high-performance computing workloads. NVIDIA's next-generation SOC, Atlan, is based on the ARM-based Grace CPU and Ampere Next GPU.
In terms of domestic vendors, Black Sesame Technologies has launched self-developed NeuralIQ ISP and DynamAI NN engine which is a deep neural network algorithm platform.
SoC vendors accelerate the layout of autonomous driving AI data training
Autonomous driving datasets are critical for training deep learning models and improving algorithm reliability. SoC vendors have launched self-developed AI training chips and supercomputing platforms. Tesla has launched the AI training chip D1 and the "Dojo" supercomputing platform, which will be used for the training of Tesla's autonomous driving neural network.
Besides, training algorithm models are becoming more and more important, including 2D annotation, 3D point cloud annotation, 2D/3D fusion annotation, semantic segmentation, target tracking, etc., such as the NVIDIA Drive Sim autonomous driving simulation platform, the Horizon Robotics "Eddie" data closed loop training platform, etc.
Foreign chip vendors:
Tesla has launched Dojo supercomputing training platform, using Tesla's self-developed 7nm AI training chip D1 and relying on a huge customer base to collect autonomous driving data, so as to achieve model training for deep learning systems. At present, Tesla Autopilot mainly uses 2D images + annotations for training and algorithm iteration. Through the Dojo supercomputing platform, Autopilot can fulfill training through 3D images + time stamps (4D Autopilot system). The 4D Autopilot system will be predictable, and mark the 3D movement trajectory of road objects to enhance the reliability of autonomous driving functions.
NVIDIA has announced NVIDIA Omniverse Replicator, an engine for generating synthetic data with ground truth for training AI networks. NVIDIA also has the most powerful training processor - the NVIDIA A100.
The map data of Mobileye's REM has covered the world. In China, Mobileye has solved the compliance problem of map data collection in China through a joint venture with Tsinghua Unigroup. Intel acquired Moovit to enhance the strength and data differentiation of REM, extend the traditional HD map data from the roadside to the user side, start from the perception redundancy of assisted autonomous driving and improve the efficiency of path planning. Intel launched its self-developed flagship AI chip - Ponte Vecchio, which will spread to Mobileye's EyeQ6 (planned for mass production in 2023). In the field of AI and servers, Intel will challenge Nvidia with CO-EMIB technology.
Domestic chip vendors:
In order to solve the long-tail problem of autonomous driving, Horizon Robotics has built a complete data closed-loop platform to iterate algorithms and improve system capabilities. Horizon Robotics has launched the "Eddie" data closed loop training platform.
Huawei has introduced "Octopus" autonomous driving open platform, focusing on the four most critical elements of autonomous driving development - hardware, data, algorithms and HD maps to build a data-centric open platform which prompts closed-loop iterations of autonomous driving. Huawei's Ascend 910 competes with the NVIDIA A100 as the world's top AI training chip. Huawei has also launched the AI training cluster Atlas 900.
Key Topics Covered:
Chapter 1 Autonomous Driving (AD) Chip Industry Overview
1.1 Introduction of ADAS/AD SoC Chip
1.1.1 Overall Architecture of Intelligent Vehicle Automotive Computing Platform
1.1.2 Evolution of Automotive EE Architecture Promotes Autonomous Driving Computing Platform Development
1.1.3 Composition of Automotive SoC Computing Chip
1.1.4 Automotive SoC Computing Chip: AI Acceleration Chip
1.1.5 Heterogeneous Design of SoC Chip Vendors (1)
1.1.6 Heterogeneous Design of SoC Chip Vendors (2)
1.1.7 Heterogeneous Design of SoC Chip Vendors (3)
1.1.8 Heterogeneous Design of SoC Chip Vendors (4)
1.1.9 Continuous Increase of SoC Master Chip Computing Power Demand
1.1.10 High Performance SoC Master Chip BOM Cost Breakdown: e.g. XXX Master Chip
1.1.11 Overall Cost of Tesla HW3.0 Controller Drops 20%
1.1.12 Cost Estimation of High Performance SoC Master Chip
1.2 ADAS/AD SoC Chip Vendors and Products Comparison
1.3 Requirements on Auto-grade ADAS/AD SoC Chip
1.3.1 Basic Requirements for Auto-grade Chip
1.3.2 Threshold for Access to Auto-grade Chip and Industry Barriers
1.3.3 Elements for Auto-grade Chip Appraisal: Performance, Price and Power Consumption
1.3.4 Automobile Supply Chain Standard System Criteria Which Auto-grade Chips Have to Meet
Chapter 2 Autonomous Driving Chip Development Trends
2.1 Trend 1: SoC Chips Compete for ISP
2.1.1 Value and Significance of ISP Image Processor
2.1.2 Automotive ISP Image Processor Layout of ARM
2.1.3 Qualcomm Snapdragon Ride Platform
2.1.4 ISP and CNN Merged into a Unified NNA
2.1.5 Tesla without ISP: Achieve AD Overall Architecture with Pure Vision Technology
2.1.6 Layout of AD SoC Vendors: Typical Solutions for Integrated ISPs (1)
2.1.7 Layout of AD SoC Vendors: Typical Solutions for Integrated ISPs (2)
2.1.8 Layout of AD SoC Vendors: Typical Solutions for Integrated ISPs (3)
2.1.9 Layout of AD SoC Vendors: Typical Solutions for Integrated ISPs (4)
2.1.10 Layout of Software Vendors: Introducing Computer Imaging Technology into Automotive ISPs
2.1.11 Layout of CMOS Vendors: ISP 2-in-1 Auto-grade CMOS Image Sensor
2.2 Trend 2: SoC Cross-domain Fusion Computing
2.2.1 AD SoC Vendors: Layout of Cross-domain Fusion Computing (1)
2.2.2 AD SoC Vendors: Layout of Cross-domain Fusion Computing (2)
2.2.3 Cross-domain Fusion High-performance Computing Software Platform of Enjoy Move
2.3 Trend 3: SoC Vendors Accelerated Layout Autonomous Driving AI Data Training
2.3.1 Autonomous Driving SoC Vendors: Layout of Data Closed-loop Training Platform (1)
2.3.2 Autonomous Driving SoC Vendors: Layout of Data Closed-loop Training Platform (2)
2.3.3 Comparison of Autonomous Driving AI Training Chips
2.4 Trend 4: SoC Vendors Accelerated Transformation to Tier 0.5
2.4.1 Former Tier 2 Automotive Chip Vendors Became Core Suppliers
2.4.2 SoC Vendors Further Transformed to Tier 0.5
2.4.3 Self-developed 4D Imaging Radar System of Mobileye
2.4.4 Mobileye Provided AD Kit Including Chip/Vision/Radar
2.4.5 Qualcomm Acquired Veoneer
Chapter 3 Research on Global AD Chip Vendors
3.1.1 Overview of NVIDIA Products
3.1.2 NVIDIA Atlan SoC Chips
3.1.3 NVIDIA ORIN SoC Chip
3.1.4 NVIDIA Xavier SoC Chips
3.1.5 NVIDIA Autonomous Driving Computing Platforms
3.1.6 NVIDIA AD Supporting Software
3.1.7 NVIDIA AD Chip Consumers
Chapter 4 Research on Chinese AD Chip Vendors
4.1 Horizon Robotics
4.1.1 Business Model Positioned as Tier2 (1)
4.1.2 Business Model Positioned as Tier2 (2)
4.1.3 ADAS/AD Chip Architecture Roadmap
4.1.4 Product Series: Chip, Tool Chain and Operating System
4.1.5 ADAS/AD Chip Products Portfolio (1)
4.1.6 ADAS/AD Chip Products Portfolio (2)
4.1.7 Journey 2/3/5 Series Products Technical Specifications Comparison
4.1.8 Journey 5 Central Computing Chip: Core Performance Parameters
4.1.9 Journey 5 Achieved ISO 26262 ASIL-B Functional Safety Product Certification
4.1.10 Journey 3 Chip: Mainly for L2+ Assisted Driving
4.1.11 Journey 2 Chip (1)
4.1.12 Journey 2 Chip (2)
4.1.13 AD Computing Platform: Matrix
4.1.14 Reference Design Computing Platforms of Journey 5 and Matrix 5
4.1.15 Full-scenario Intelligent Driving Solutions Computing Platform: Matrix 5
4.1.16 Horizon Matrix? FSD Solution
4.1.17 Horizon Halo? Automotive Intelligent Interaction Solution
4.1.18 Horizon Matrix? Mono and Horizon Matrix? Pilot
4.1.19 Horizon Matrix Mono 2.0
4.1.20 Microkernel Architecture Real-time Automotive Operating System: Together OS (1)
4.1.21 Microkernel Architecture Real-time Automotive Operating System: Together OS (2)
4.1.22 Complete Development Tool Chain
4.1.23 "Horizon OpenExplorer Platform" AI Development Platform
4.1.24 Data Closed-loop Development Platform
4.1.25 Consumers System
4.3 Black Sesame Technologies
4.5 Dahua Leap Motor
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