| Previous close | 6.70 |
| Open | 6.75 |
| Bid | 6.61 x 500 |
| Ask | 6.68 x 100 |
| Day's range | 6.57 - 6.89 |
| 52-week range | 3.69 - 8.08 |
| Volume | |
| Avg. volume | 147,191 |
| Market cap | 254.379M |
| Beta (5Y monthly) | 1.03 |
| PE ratio (TTM) | N/A |
| EPS (TTM) | N/A |
| Earnings date | N/A |
| Forward dividend & yield | N/A (N/A) |
| Ex-dividend date | N/A |
| 1y target est | N/A |
- GlobeNewswire
Arteris to Announce Financial Results for the First Quarter 2024 on Thursday, May 2, 2024
CAMPBELL, Calif., April 23, 2024 (GLOBE NEWSWIRE) -- Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced that it will release its financial results for the first quarter ended March 31, 2024, after market close on Thursday, May 2, 2024. Management will host a conference call on Thursday, May 2, 2024 at 4:30 PM ET to discuss these results. The call will be available, live, to interested parties by dialing: United States/Can
- GlobeNewswire
Rebellions Selects Arteris for Its Next-Generation Neural Processing Unit Aimed at Generative AI
Arteris’ FlexNoC interconnect IP and Magillem SoC integration software enable superior performance and efficient customization of AI inference chips for the emerging Generative AI market and other AI applicationsCAMPBELL, Calif., April 09, 2024 (GLOBE NEWSWIRE) -- Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced that Rebellions, a pioneering AI semiconductor startup, will deploy FlexNoC interconnect IP plus Magillem Con
- GlobeNewswire
Arteris Expands Automotive Solutions for Armv9 Architecture CPUs
Highlights: Arteris delivers on previously announced collaboration with Arm to speed up automotive electronics innovation with an emulation-based validation system for Armv9 and CHI-E based designs.Arteris aligned roadmap with Arm to enable designers to get to market faster with an optimized and pre-validated high-bandwidth, low-latency Ncore cache coherent interconnect IP for Arm's Automotive Enhanced (AE) compute portfolio.Collaboration integrates Arm processors with Arteris interconnect IP to
